By use of our new, complete, and cost-competitive 3D-IC/Si-Interposer/MEMS line of 200/300 mm wafer with state‐of‐the‐art equipments such as:
- Lithography (i-line stepper with IR alignment)
- Si/SiO2 deep etch
- CVD (TSV liner)
- Sputter
- Electroplating
- Metal etch
- Temporary bonding
- Temporary debonding,

We provide worldwide customers with a cost‐effective and short‐term TAT partial process service as below:

- Wafer thinning,

- TSV making,

- Si/SiO2 deep trench,

- Bump formulation,

- RDL (Cu damascene is available),

- Bonding, etc.